GNSS Sensor Ltd provides IP cores and supporting development tools for on-chip integration of the embedded processors and proprietary satellite navigation engine.
We specialize in digital hardware design for commercial applications.

ASIC evaluation board

      The MK180.32-1 development board has been designed to verify the concept of integration of our GNSS library and third-party processor system. The main purpose of the board to be a demonstration platform with evaluating GNSS quality but it can be used as a stand-alone GPS/SBAS/GLONASS/Galileo receiver and tracker with the direct measurements writing on SD-card either as universal SPARC V8 development platform.

      The MK180.32-1 development board comprises a custom designed PCB in a "credit card" format (53 mm x 87 mm) making the board very compact and comparable with many popular MCU development boards.


      ASIC CPU features:

  • LEON3 SPARC V8 compliant 32-bit processor (100 MHz)
  • Memomry management unit (MMU 32 TLB entries) and 16 KiB multi-way instruction/data caches
  • Internal on-chip high speed AMBA (AHB) bus
  • Instruction trace and AMBA (AHB) trace buffers for debugging
  • Timer unit with four 32-bit timers including watchdog
  • Interrupt controller for 31 interrupts
  • On-chip 512 kBytes SRAM


      ASIC GNSS features:

  • 2 complex I/Q ADC inputs
  • 12 GPS-L1 channels
  • 2 SBAS-L1 channels
  • 12 GLO-L1 channels
  • 6 Galileo-E1 channels
  • 3 independent Fast Search Engines (GPS, Glonass, Galileo) to provide 1 second period of the detection (Doppler frequency and Range) for all satellites
  • RF-control block (APB) with 2 SPIs channels
  • IMU-control block (APB) with 3-axis gyroscope and 3-axis accelerometer SPI channels
  • On-chip ROM block with the stable version of the firmware including LMS positioning engine
  • Integrated CPU profiler

      GNSS performance:

  • TTFF Cold Start: 35 s
  • TTFF Warm Start: 25 s
  • TTFF Hot Start: 2 s
  • Re-acquisition time: 1 s
  • Tracking Sensitivity (static mode): 160 dBm
  • Acquisition in Cold Start: 146 dBm
  • Horizontal accuracy with the pure LMS embedded positioning: 15 m
  • Update rate is limited by UART speed at: 20 Hz

      Development board features:

  • Power from the USB (external +5V also supported)
  • UART to USB bridge with the USB connector
  • 2 antenna inputs
  • 3-axis accelerometer and gyroscope
  • JTAG debug interface
  • Reset and CPU break buttons
  • SD-card slot with FAT16 support on the Boot stage
  • 4 Control pins: Boot from SD-card, ASIC Built-in Self Test (BIST), ADC clock emulation, Direct write to SD.
  • 12 General purpose IOs: 8 programmed as LEDs output, 4 as input DIP switches.

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